This invention relates to semiconductor memory devices and more particularly to an N-channel silicon gate MOS random access memory and a process for making said memory.
Semiconductor memory devices are widely used in the manufacture of digital equipment such as microprocessor systems and minicomputers. One of the key elements in this equipment in the random access memory or RAM, used for storing information and then recalling it. Originally RAMs were fabricated using bipolar technologies such as transistor-transistor logic or TTL but because of the trend toward increasing circuit densities TTL has given way to MOS technologies. More recently, RAMs have been fabricated using the N-channel silicon gate MOS technology because of its higher speed and higher circuit density. The standard memory cell used in these RAMs consists of an N-channel silicon gate MOS transistor and an MOS capacitor, the capacitor being used as a charge storage element. The use of the MOS capacitor requires surface chip area and consequently limits the minimum cell size. The VMOS technology with its grooves etched in the slice solves some of the cell size problems but has the disadvantage of a non-planar surface.
It is the principal object of the invention to provide a very small semiconductor random access memory cell. Another object of the invention is to provide a semiconductor random access memory cell with an increase in the ratio of available charge storage area to cell area. A further object of the invention is to provide a process for making a memory cell which is compatable with standard N-channel silicon gate MOS manufacturing techniques.